One tensor program. Two real chips. Bit-exact.
TinyCompiler turns C = relu(A @ B) intotiny-gpu SIMT kernels and into atiny-tpu tile schedule. Both run on the real simulator and the real RTL, and both match numpy exactly.
C = relu(A @ B) compiled to both chips. The array is tiny-tpu's real RTL, cycle by cycle, from the Compiler Explorer.What is checked, on every commit
- Every result equals a numpy oracle computed from the source program, on both chips.
- Differential fuzzing: random programs through every backend and optimization level on the real chips; 5,000-program runs were green twice.
- The chips' facts the compiler relies on are measured and pinned (tiny-tpu: 15 cycles per pass; tiny-gpu: a loop of K iterations costs K cycles).
- The TPU cost model equals the measured RTL cycles exactly.
Optimizing the tiny-gpu kernel (8×8 matmul + relu, measured)
| level | instructions | cycles | global loads |
|---|---|---|---|
| -O0 naive | 7320 | 10 | 1088 |
| -O1 licm + strength reduction | 5208 (−29%) | 9 | 1024 |
| -O2 tiling, unrolling, folding | 3288 (−55%) | 3 | 576 (−47%) |
Per-pass numbers, and why -O2 is not simply better, are in the architecture notes.
TinyCompiler is the fourth project in a series withtiny-gpu,tiny-tpu and tiny-cpu.